Latest news

Master lab Entwurf integrierter Digitalschaltungen mit VHDL

Created by Felix Bruns | |   Aktuelle Meldungen | Insys

Information

In­for­ma­tio­nen about the lab

This semester, the lab will be conducted in cooperation with the Chair for Embedded Systems in Information Technology.

The lab will be held weekly, Wednesday at 15:00 in room ID 1-103.

Preliminary discussion: Wednesday, 10.10.2012 at 15:00 in room ID 1-103.

Pre-registration: as of now with Dipl.-Ing. Felix Bruns, email: felix.​bruns@​rub.​de, room: ID 1-336

Back
To Top